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Silicon Labs /Series1 /EFM32GG11B /EFM32GG11B420F2048GM64 /MSC /IF

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Interpret as IF

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (ERASE)ERASE 0 (WRITE)WRITE 0 (CHOF)CHOF 0 (CMOF)CMOF 0 (PWRUPF)PWRUPF 0 (ICACHERR)ICACHERR 0 (WDATAOV)WDATAOV 0 (LVEWRITE)LVEWRITE 0 (RAMERR1B)RAMERR1B 0 (RAMERR2B)RAMERR2B 0 (RAM1ERR1B)RAM1ERR1B 0 (RAM1ERR2B)RAM1ERR2B

Description

Interrupt Flag Register

Fields

ERASE

Erase Done Interrupt Read Flag
WRITE

Write Done Interrupt Read Flag
CHOF

Cache Hits Overflow Interrupt Flag
CMOF

Cache Misses Overflow Interrupt Flag
PWRUPF

Flash Power Up Sequence Complete Flag
ICACHERR

ICache RAM Parity Error Flag
WDATAOV

Flash Controller Write Buffer Overflow
LVEWRITE

Flash LVE Write Error Flag
RAMERR1B

RAM 1-bit ECC Error Interrupt Flag
RAMERR2B

RAM 2-bit ECC Error Interrupt Flag
RAM1ERR1B

RAM1 1-bit ECC Error Interrupt Flag
RAM1ERR2B

RAM1 2-bit ECC Error Interrupt Flag

Links

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Register License

  • SPDX-License-Identifier: Zlib
  • The licensor of this software is Silicon Laboratories Inc.
  • This software is provided ‘as-is’, without any express or implied
  • warranty. In no event will the authors be held liable for any damages
  • arising from the use of this software.
  • Permission is granted to anyone to use this software for any purpose,
  • including commercial applications, and to alter it and redistribute it
  • freely, subject to the following restrictions:
    1. The origin of this software must not be misrepresented; you must not
  • claim that you wrote the original software. If you use this software
  • in a product, an acknowledgment in the product documentation would be
  • appreciated but is not required.
    1. Altered source versions must be plainly marked as such, and must not be
  • misrepresented as being the original software.
    1. This notice may not be removed or altered from any source distribution.
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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data